Recently, high performance electronic equipment reduced in size and weight has been desired in the market. With this tendency, the packaging density of a semiconductor device has increased year by year. On the other hand, surface packaging of a semiconductor device has been accelerated. In the circumstances, an area-mounted semiconductor device has been newly developed and a semiconductor device has been just shifted from the conventional structure toward this type. An area-mounted semiconductor device is represented by a ball grid array semiconductor device (hereinafter referred to as “BGA”) and a chip size package semiconductor device (hereinafter referred to as “CSP”) further reduced in size. These structures have been developed so as to satisfy the requirements for increasing the number of pins and high speed operation, which have been no longer satisfied by conventional surface-mounted semiconductor devices such as QFP and SOP. The area-mounted semiconductor device has a structure formed by mounting a semiconductor element on one of the surfaces of a circuit board, which is typically formed of a bismaleimide-triazine (hereinafter referred to as “BT”) resin/copper foil, and molding/sealing the surface having the semiconductor element mounted thereon, that is, only one of the surfaces of the substrate, with an epoxy resin composition. Since a resin sealed layer of several-hundreds μm to several mm in thickness is formed on the surface having a semiconductor element mounted thereon, one of the surfaces is substantially sealed. Therefore, an organic substrate is likely affected by misalignment between a metal substrate and a cured product of an epoxy resin composition due to thermal expansion/thermal shrinkage, or affected by shrinkage taking place when an epoxy resin composition is molded/cured, with the result that the organic substrate used in these semiconductor devices is likely to warp immediately after molding. A semiconductor device is exposed to a temperature of 230° C. to 260° C. during a connecting process with solder, whereas it is sometimes exposed to a temperature of −55° C., for example, during a temperature cycle test. At this time, when the amount of warpage increases, wiring will break, causing conduction failure or a crack will generate in the resin portion. When the crack grows, wiring may break. Studies of reducing warpage have been made by many researchers. For example, warpage produced by cooling a substrate to normal temperature after molding is reduced by using a triphenyl based epoxy or a naphthalene based multifunctional epoxy whose glass transition temperature has been set at not less than a molding temperature (see, for example, Japanese Patent Application Laid-Open No. 2002-37863). However, when the substrate is exposed to an atmosphere of 260° C., in consideration of a later step in which the temperature of the substrate is increased to a reflow temperature, warpage increases. Furthermore, usually a flame retardant such as aluminum hydroxide is added to ensure flame retardancy; however, addition of the flame retardant may increase warpage particularly at 260° C. depending upon the type of flame retardant.
Warpage increases particularly at 260° C. This is because the glass transition temperature (hereinafter referred to as “Tg”) is low. To explain more specifically, since value of the linear expansion coefficient (hereinafter referred to as “α2”) of a resin increases at a temperature of Tg or more, the difference in linear expansion coefficient between the substrate and the resin increases, increasing warpage of the semiconductor device. Thus, it has been desired to urgently develop a novel semiconductor sealing epoxy resin composition having a higher Tg while maintaining low water absorption, having low value of α2 at a temperature of Tg or more, excellent in solder crack resistance and flowability while maintaining flame retardancy, and exhibiting less warpage at a temperature from −55° C. to 260° C.
The present invention provides an epoxy resin composition for use in an area-mounted semiconductor device exhibiting less warpage after molding and during a solder treatment process as well as during a low temperature process of, for example, a temperature cycle test, and excellent in flame retardancy, solder crack resistance and flowability, and provides a semiconductor device using the same. The present invention further provides an epoxy resin composition excellent in curing ability and a semiconductor device using the same.